Prof. Robert Brayton received the BSEE degree from Iowa State University in 1956 and the Ph.D. degree in mathematics from MIT in 1961. From 1961 to 1987 he was a member of the Mathematical Sciences Department of the IBM T. J. Watson Research Center. In 1987 he joined the EECS Department at Berkeley, where he is the Cadence Distinguished Professor of Engineering and the director of the SRC Center of Excellence for Design Sciences.

He has authored over 400 technical papers, and 9 books,

Dr. Brayton held the Edgar L. and Harold H. Buttner Endowed Chair in Electrical Engineering at Berkeley from 1996-1999. He is a member of the National Academy of Engineering, and a Fellow of the IEEE and the AAAS. He received the 1991 IEEE CAS Technical Achievement Award, and five best paper awards, including the 1971 IEEE Guilleman-Cauer award, and the 1987 ISCAS Darlington award. He was the editor of the Journal on Formal Methods in Systems Design from 1992-1996. He received the CAS Golden Jubilee Medal and the IEEE Millennium Medal in 2000.

Past contributions have been in analysis of nonlinear networks, electrical simulation and optimization of circuits, and asynchronous synthesis. Current research involves combinational and sequential logic synthesis for area/performance/testability, formal design verification and logical/physical synthesis for DSM designs.

Prof. Forrest Brewer joined the UCSB faculty in 1988, he was formerly a consulting engineer and a senior engineer at Northrop Corp. Advanced Technology Division. His research interests are in VLSI design as well as computer aided design tools and analysis. Recent work is in the development of a family of specialized microprocessors for low-power/ high-performance embedded closed loop control.

This work spans mixed signal design at the sensor and actuator interfaces to multi-threaded digital system design in the digital processing parts. By using multi-threading and other architectural tricks, substantial power reduction and performance improvement is possible when compared to commodity DSP processors for this problem. A related issue in this domain is fault tolerance in the controller as such controllers are often deployed in nasty environments such as automobiles or space applications. He also works on formal techniques for design representation and related software tools as well as generic chip feasibility and design analysis which are done on a consulting basis.

An example of the formal work is the processor designs above, which are specified in TDL, a very high level language which provides latency tolerance as well as eliminating a large number of critical paths in the resulting core.

He was a co-recipient of several awards including the 1993 IEEE Communications Society's Best Tutorial Paper Award, the IEEE Electron Devices Society's 1997 Paul Rappaport Award for the Best Paper in an EDS publication during 1997, the1999 DAC Student Design Contest Award, the first place in the 2004 DAC/ISSCC Student Design Contest Award (operational category), and the ISSCC 2007 Beatrice Winner Award for Editorial Excellence. He held the Analog Devices Career Development Chair from 1994 to 1997. He received the NSF Career Development award in 1995, the IBM Faculty Development award in 1995 and the National Semiconductor Faculty Development award in 1996 and 1997.

His research interests include micro-power digital and mixed-signal integrated circuit design, wireless microsensor system design, ultra-wideband radios, and emerging technologies. He is a co-author of Low Power Digital CMOS Design (Kluwer Academic Publishers, 1995), Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition), and Sub-threshold Design for Ultra-Low Power Systems (Springer 2006). He is also a co-editor of Low Power CMOS Design (IEEE Press, 1998), Design of High-Performance Microprocessor Circuits (IEEE Press, 2000), and Leakage in Nanometer CMOS Technologies (Springer, 2005).

He has served as a technical program co-chair for the 1997 International Symposium on Low Power Electronics and Design (ISLPED), VLSI Design '98, and the 1998 IEEE Workshop on Signal Processing Systems. He was the Signal Processing Sub-committee Chair for ISSCC 1999-2001, the Program Vice-Chair for ISSCC 2002, the Program Chair for ISSCC 2003, and the Technology Directions Sub-committee Chair for ISSCC 2004-2007. He is the Technology Directions Chair for ISSCC 2008. He was an Associate Editor for the IEEE Journal of Solid-State Circuits from 1998 to 2001. He served on SSCS AdCom from 2000 to 2007 and he was the meetings committee chair from 2004 to 2007. He is a Fellow of the IEEE. He is the Director of the MIT Microsystems Technology Labs.

Prof. Tim Cheng worked at Bell Laboratories in Murray Hill, NJ, from 1988 to 1993 and joined the faculty at the University of California, Santa Barbara in 1993 where he is currently Professor and Chair of the Electrical and Computer Engineering Department. He was the founding director of UCSB's Computer Engineering program. His current research interests include design validation, verification, testing and multimedia computing. He has published over 250 technical papers, co-authored three books and holds nine U.S. Patents in these areas. He has also been working closely with US industry and government agencies for projects in these areas. Prof. Cheng, a fellow of IEEE, received Best Paper Awards at the 1994 Design Automation Conference and 1999 Design Automation Conference, 2001 Annual Best Paper Award in Journal of Information Science and Engineering, Best Paper Award in 2003 Conference of Design Automation and Test in Europe (DATE 2003), and the Best Paper award at 1987 AT&T Conference on Electronic Testing. He currently serves as Editor-in-Chief for IEEE Design and Test of Computers, Associate Editor for ACM Transactions on Design Automation of Electronic Systems, Associate Editor for Formal Methods in System Design, Editor for Journal of Electronic Testing: Theory and Applications, and Editor for Foundations and Trends in Electronic Design Automation. He had also served on the Editorial Board of IEEE Trans. on Computer-Aided Design. He has been General Chair and Program Chair of IEEE International Test Synthesis Workshop, Program Co-Chair of International Mixed-Signal Test Workshop and served on the technical program committees for a number of international conferences on design, design automation and test.

Awards/Honors

• Best Paper Award , Conference of Design Automation and Test in Europe, 2003
• Annual Best Paper Award in Journal of Information Science and Engineering, 2001 Fellow, IEEE, 2000
• Best Paper Awards, Design Automation Conference, 1999
• Best Paper Awards, Design Automation Conference, 1994
• Best Paper award, AT&T Conference on Electronic Testing, 1987

Prof. Kahng has published well over 300 journal and conference papers. His Ph.D. graduates (Robins, Hagen, Boese, Alpert, Tsao, Muddu, Huang, Markov, Liu, Chen, Mantik, Xu, Wang, Reda, Gupta) have gone on to notable successes in both academia and industry. He has received NSF Research Initiation and Young Investigator awards, 11 Best Paper nominations, and 6 Best Paper awards (DAC, ISQED (2), ICCD, ASP-DAC/VLSI Design, and BACUS). He was the founding General Chair of the 1997 ACM/IEEE International Symposium on Physical Design, co-founder of the ACM Workshop on System-Level Interconnect Prediction, and defined the physical design roadmap as a member of the Design Tools and Test technology working group (TWG) for the 1997, 1998 and 1999 renewals of the International Technology Roadmap for Semiconductors (International Technology Roadmap for Semiconductors). He has also served as a member of the EDA Council's EDA 200X task force, which produced this report. He has been Chair of the U.S. Design Technology Working Group, and of the Design International Technology Working Group, for the 2001 renewal, 2002 update, and 2003 renewal of the International Technology Roadmap for Semiconductors.

He was Technical Program Chair of EDP-2001 (the workshop of the Electronic Design Processes Subcommittee of the IEEE DATC), and General Chair of EDP-2002. He was also on the steering committees of ISPD-2001/2002 and SLIP-2001. He is currently the Technical Program Co-Chair of the 2004 Design Automation Conference, and remains on the committees of ISPD, SLIP, and EDP, as well as on the editorial boards of IEEE Transactions on VLSI, IEEE Transactions on Circuits and Systems I, and IEEE Design and Test (where he contributes the regular column, "The Road Ahead").

Prof. Kahng's research interests include the VLSI design-manufacturing interface, VLSI physical layout design and performance analysis, combinatorial and graph algorithms, stochastic global optimization, and (as the opportunity arises) other areas of applied algorithmics such as bioinformatics or computational commerce.

Alan Mishchenko graduated from Moscow Institute of Physics and Technology (Moscow, Russia) in 1993 with M.S.and received his Ph.D. from the Glushkov Institute of Cybernetics (Kiev, Ukraine) in 1997. From 1998 to 2002 he was an Intel-sponsored visiting scientist at Portland State University. In 2002, he joined the EECS Department at UC Berkeley, where he is currently an associate researcher in the group of Professor Brayton. Alan's research interests are in developing computationally efficient methods for synthesis and verification.

For more information, please visit Alan's webpage:
http://www.eecs.berkeley.edu/~alanmi/

Prof. Massoud Pedram received M.S. and Ph.D. in Electrical Engineering and Computer Sciences from the University of California, Berkeley in 1989 and 1991, respectively. He obtained his B.S. degree in Electrical Engineering from the California Institute of Technology in 1986. He joined the Department of Electrical Engineering at the University of Southern California where he is currently a professor and Chair of the Computer Engineering division. Dr. Pedram is a recipient of the National Science Foundation's Young Investigator Award (1994) and the Presidential Early Career Award for Scientists and Engineers (a.k.a. the Presidential Faculty Fellows Award) (1996). His research has received a number of awards including two Best Paper Awards from the International Conference on Computer Design, two Design Automation Conference Best Paper Awards, an IEEE Transactions on VLSI Systems Best Paper Award, and an IEEE Circuits and Systems Society Guillemin-Cauer Award.

Dr. Pedram has served on the technical program committee of a number of conferences and workshops, including Design Automation Conference (DAC), Design and Test in Europe (DATE), Asia-Pacific Design Automation Conference (ASP-DAC), International Conference on Computer Aided Design (ICCAD), International Symposium on Low Power Electronics and Design (ISLPED), International Symposium on Physical Design (ISPD), and International Workshop on Logic Synthesis (IWLS). Dr. Pedram was a co-founder and general chair of the 1995 International Symposium on Low Power Design and the technical co-chair and general co-chair of the 1996 and 1997 International Symposium on Low Power Electronics and Design, respectively. He was the Technical Chair of the 2002 International Symposium on Physical Design and is the General Chair of the 2003 symposium. Dr. Pedram has given several tutorials on low power design at major CAD conferences and forums including, DAC, ICCAD, and ASP-DAC. He has published more than 300 journal and conference papers and written four books on various aspects of low power design.

Dr. Pedram is an IEEE Fellow and an ACM member. He serves on the Advisory Board of the ACM Special Interest Group on Design Automation. He served as an Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM Transcations on Design Automation of Electronic Systems. He received the 2000 Distinguished Service Award of ACM - SIGDA for contributions in developing the SIGDA Multimedia Monograph Series and organizing the Young Student Support Program. Dr. Pedram was a member of the Board of Governors of the IEEE Circuits and Systems Society from 2000 to 2002, Chair of the Distinguished Lecturer Program of the IEEE CASS for 2003 and 2004, and the CASS VP of Publications in 2005 and 2006.

His research specializations include:

• Dynamic Power Management and Power-Aware Design
• Architectural and RT-Level Power Analysis, Design, and Optimization
• Ultra Low Power Circuit Design Techniques
• Power Conversion and Regulation Technologies
• Smart Battery Design
• Physical Design Optimization and Logic Synthesis Techniques
• Design Automation Tools and Flows for Performance and Reliability
• Optimization of VLSI Circuits
• Signal Integrity Analysis and Optimization of VLSI Interconnects
• Power-Aware Wireless Sensor Networks
• Nanotechnology and Beyond CMOS Technologies

Prof. Sachin Sapatnekar received the B. Tech. degree from the Indian Institute of Technology, Bombay in 1987, the M. S. degree from Syracuse University in 1989, and the Ph. D. degree from the University of Illinois at Urbana-Champaign in 1992. He has worked at Texas Instruments during the summer of 1990, and at Intel Corporation during the summer of 1997. His other major educational qualifications include self-taught basic juggling under the long-distance tutelage of the world-renowned Klutz School in 1991, and the PADI Open Water Diver Certification from Deep Sea Divers Den in 2001. With his once-a-decade average of trying something new, he is sure to remain his same old boring self until 2011.

He was an Assistant Professor in the Department of Electrical and Computer Engineering at Iowa State University from 1992 to 1997. He is currently a Professor in the Department of Electrical and Computer Engineering at the University of Minnesota, where he holds the Robert and Marjorie Henle chair. His current research interests lie in developing efficient techniques for computer-aided design of integrated circuits, and are primarily centered around physical design, timing and simulation issues, and optimization algorithms. He has authored/coauthored/coedited five books and has served on the editorial boards of the IEEE Transactions on VLSI Systems (current) and the IEEE Transactions on CAD (currently as deputy editor-in-chief) and the IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (in the past), has served on the Technical Program Committee for various conferences, including as technical program co-chair for DAC 2006 and 2007. He has been a Distinguished Visitor for the IEEE Computer Society and a Distinguished Lecturer for the IEEE Circuits and Systems Society, and is a recipient of the NSF Career Award, the SRC Technical Excellence Award, and best paper awards at the DAC'97, ICCD'98, DAC'01 and DAC'03 conferences. He is a Fellow of the IEEE.